Invention Grant
- Patent Title: Multibit recyclic pipelined ADC architecture
- Patent Title (中): 多位循环流水线ADC结构
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Application No.: US12639705Application Date: 2009-12-16
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Publication No.: US07948410B2Publication Date: 2011-05-24
- Inventor: Jagannathan Venkataraman , Visvesvaraya A. Pentakota , Sandeep K. Oswal , Samarth S. Modi , Shagun Dusad
- Applicant: Jagannathan Venkataraman , Visvesvaraya A. Pentakota , Sandeep K. Oswal , Samarth S. Modi , Shagun Dusad
- Applicant Address: US TX Dallas
- Assignee: Texas Instruments Incorporated
- Current Assignee: Texas Instruments Incorporated
- Current Assignee Address: US TX Dallas
- Agent John J. Patti; Wade J. Brady, III; Frederick J. Telecky, Jr.
- Priority: IN1718/CHE/2009 20090720
- Main IPC: H03M1/00
- IPC: H03M1/00

Abstract:
An apparatus is provided. The apparatus comprises a sample switch, a sampling capacitor, an amplifier, feedback branches, a second hold switch, an N-bit converter pair, a third hold switch, and an M-bit converter pair. The sample receives an input signal and is actuated by a sample signal. The sampling capacitor is coupled to the sample switch. The amplifier has a first input terminal that is coupled to the sampling capacitor. The feedback branches are coupled between the output terminal of the amplifier and the first input terminal of the amplifier, with each feedback branch including a feedback capacitor, and a first hold switch that is coupled to the feedback capacitor. The second hold switch is coupled to the sampling switch. The N-bit converter pair is coupled to the sampling switch and to the second hold switch. The third hold switch is coupled to at least one of the feedback branches, and the M-bit converter pair is coupled to the output terminal of the amplifier and to the third hold switch.
Public/Granted literature
- US20110012764A1 MULTIBIT RECYCLIC PIPELINED ADC ARCHITECTURE Public/Granted day:2011-01-20
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