Invention Grant
- Patent Title: Semiconductor memory device
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Application No.: US12878534Application Date: 2010-09-09
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Publication No.: US07948787B2Publication Date: 2011-05-24
- Inventor: Satoshi Ishikura , Marefusa Kurumada , Hiroaki Okuyama , Yoshinobu Yamagami , Toshio Terano
- Applicant: Satoshi Ishikura , Marefusa Kurumada , Hiroaki Okuyama , Yoshinobu Yamagami , Toshio Terano
- Applicant Address: JP Osaka
- Assignee: Panasonic Corporation
- Current Assignee: Panasonic Corporation
- Current Assignee Address: JP Osaka
- Agency: McDermott Will & Emery LLP
- Priority: JP2006-344095 20061221; JP2007-327066 20071219
- Main IPC: G11C5/06
- IPC: G11C5/06 ; G11C7/00 ; G11C7/02

Abstract:
A semiconductor memory device comprises a plurality of memory cells each including a holding circuit for holding memory data, and a read-only output circuit for outputting a signal corresponding to the data held by the holding circuit. The read-only output circuit has a read drive transistor controlled in accordance with a signal held by the holding circuit. A gate length of the read drive transistor is longer than a gate length of a transistor included in the holding circuit. Alternatively, the read-only output circuit has a read access transistor controlled in accordance with a read word select signal, and a gate length of the read access transistor is longer than a gate length of a transistor included in the holding circuit.
Public/Granted literature
- US20110007575A1 SEMICONDUCTOR MEMORY DEVICE Public/Granted day:2011-01-13
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