Invention Grant
- Patent Title: Clock synchroniser
- Patent Title (中): 时钟同步器
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Application No.: US12533422Application Date: 2009-07-31
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Publication No.: US07949083B2Publication Date: 2011-05-24
- Inventor: Paul Lesso
- Applicant: Paul Lesso
- Applicant Address: GB Edinburgh
- Assignee: Wolfson Microelectronics plc
- Current Assignee: Wolfson Microelectronics plc
- Current Assignee Address: GB Edinburgh
- Agency: Dickstein Shapiro LLP
- Priority: GB0329233.1 20031217
- Main IPC: H03D3/24
- IPC: H03D3/24

Abstract:
A clock synchronizer for generating a local clock signal synchronized to a received clock signal. The clock synchronizer incorporates a reference oscillator providing a reference signal, and a synthesizer circuit arranged to synthesize a local clock signal from the reference signal. The synthesizer circuit comprises a phase-locked-loop circuit, including a phase detector receiving the reference signal, and a controllable divider arranged in a feedback path from a controlled oscillator to the phase detector, the divider being controllable to set a frequency division value N along the path to determine a ratio of the local clock frequency to the reference frequency. The clock synchronizer also incorporates a clock comparison circuit adapted to generate a digital signal indicative of an asynchronism between the local and received clock signals. A control link is arranged to link the clock comparison circuit to the divider. This link receives the digital signal and provides a control signal to the divider to adjust the frequency division value N according to the digital signal, to alter the local clock frequency and reduce the asynchronism.
Public/Granted literature
- US20100020912A1 CLOCK SYNCHRONISER Public/Granted day:2010-01-28
Information query
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