Changing a via density for viafill vias to improve wafer surface planarity for later photolithography is provided, in one embodiment, by obtaining a circuit design including a plurality of viafill vias having differing via density across the circuit design, each viafill via interconnecting non-functional metal fill shapes in different layers of the circuit design; selecting a region of the circuit design to evaluate using an evaluation window; determining a via density within the evaluation window; and changing a number of viafill vias within the region in the circuit design in response to the via density being different than a threshold via density that is selected such that a coating deposited over the plurality of vias presents a substantially planar surface.