Invention Grant
- Patent Title: Method for programming a memory structure
- Patent Title (中): 用于编程存储器结构的方法
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Application No.: US12943937Application Date: 2010-11-11
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Publication No.: US07952934B2Publication Date: 2011-05-31
- Inventor: Riichiro Shirota , Ching-Hsiang Hsu , Cheng-Jye Liu
- Applicant: Riichiro Shirota , Ching-Hsiang Hsu , Cheng-Jye Liu
- Applicant Address: TW Science Park, Hsinchu
- Assignee: Powerflash Technology Corporation
- Current Assignee: Powerflash Technology Corporation
- Current Assignee Address: TW Science Park, Hsinchu
- Agent Winston Hsu; Scott Margo
- Priority: TW96151629A 20071231
- Main IPC: G11C11/34
- IPC: G11C11/34

Abstract:
A memory structure includes a first memory cell and a second memory cell located at an identical bit line and adjacent to the first memory cell. Each memory cell includes a substrate, a source, a drain, a charge storage device, and a gate. A method for programming the memory structure includes respectively providing a first gate biasing voltage and a second gate biasing voltage to the gates of the first memory cell and the second memory cell, boosting an absolute value of a channel voltage of the first memory cell to generate electron and hole pairs at the drain of the second memory cell through gate-induced drain leakage or band-to-band tunneling, and injecting the hole of the generated electron and hole pairs into the charge storage device of the first memory cell to program the first memory cell.
Public/Granted literature
- US20110051526A1 METHOD FOR PROGRAMMING A MEMORY STRUCTURE Public/Granted day:2011-03-03
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