Invention Grant
US07955485B2 Planar laminate substrate and method for fabricating organic laminate substrate PCBS, semiconductors, semiconductor wafers and semiconductor devices having miniaturized electrical pathways 失效
平面层叠基板和有机层叠基板PCBS,半导体,半导体晶片和具有小型化电路的半导体器件的制造方法

  • Patent Title: Planar laminate substrate and method for fabricating organic laminate substrate PCBS, semiconductors, semiconductor wafers and semiconductor devices having miniaturized electrical pathways
  • Patent Title (中): 平面层叠基板和有机层叠基板PCBS,半导体,半导体晶片和具有小型化电路的半导体器件的制造方法
  • Application No.: US12218867
    Application Date: 2008-07-17
  • Publication No.: US07955485B2
    Publication Date: 2011-06-07
  • Inventor: William Kent Gregory
  • Applicant: William Kent Gregory
  • Agent Mark S. Hubert
  • Main IPC: C25D5/02
  • IPC: C25D5/02
Planar laminate substrate and method for fabricating organic laminate substrate PCBS, semiconductors, semiconductor wafers and semiconductor devices having miniaturized electrical pathways
Abstract:
The present invention is a method of manufacturing miniaturized organic laminate substrate PCB, semiconductors, semiconductor wafers and semiconductor devices that have a 50% reduction in physical dimensions with respect to prior art existing organic laminate substrate PCB, semiconductors, semiconductor wafers and semiconductor devices. The base planar substrate has a vapor deposited 0.02 mil thick copper cladding thereon its first planar surface that has been affixed atop a hydrophillic layer, and an adhesive layer on its second planar surface. The copper cladding has sufficient peel strength and a low enough etch factor so as to allow 10 micron (or smaller) electrical trace pathways to be formed thereon when the steps of a specifically designed manufacturing methodology are followed.
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