Invention Grant
- Patent Title: Non-volatile memory cell devices and methods
- Patent Title (中): 非易失性存储单元器件及方法
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Application No.: US11513933Application Date: 2006-08-31
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Publication No.: US07955935B2Publication Date: 2011-06-07
- Inventor: Gurtej S. Sandhu , Kirk D. Prall
- Applicant: Gurtej S. Sandhu , Kirk D. Prall
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Brooks, Cameron & Huebsch, PLLC
- Main IPC: H01L21/336
- IPC: H01L21/336

Abstract:
A method of fabricating a memory cell including forming nanodots over a first dielectric layer and forming an intergate dielectric layer over the nanodots, where the intergate dielectric layer encases the nanodots. To form sidewalls of the memory cell, a portion of the intergate dielectric layer is removed with a dry etch, where the sidewalls include a location where a nanodot has been deposited. A spacing layer is formed over the sidewalls to cover the location where a nanodot has been deposited and the remaining portion of the intergate dielectric layer and the nanodots can be removed with an etch selective to the intergate dielectric layer.
Public/Granted literature
- US20080121976A1 Non-volatile memory cell devices and methods Public/Granted day:2008-05-29
Information query
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