Invention Grant
- Patent Title: Method and apparatus for improvements in chip manufacture and design
- Patent Title (中): 改进芯片制造和设计的方法和装置
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Application No.: US12375854Application Date: 2006-08-01
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Publication No.: US07955973B2Publication Date: 2011-06-07
- Inventor: Michel Zecri
- Applicant: Michel Zecri
- Applicant Address: US TX Austin
- Assignee: Freescale Semiconductor, Inc.
- Current Assignee: Freescale Semiconductor, Inc.
- Current Assignee Address: US TX Austin
- International Application: PCT/IB2006/054088 WO 20060801
- International Announcement: WO2008/015500 WO 20080207
- Main IPC: H01L21/44
- IPC: H01L21/44 ; H01L23/42

Abstract:
A method of securing a bond pad in to a semiconductor chip having an upper top metal surface which includes one or more holes, the method comprising the steps of forming a passivation layer over the upper metal surface, which passivation layer has holes therein substantially corresponding to the or each hole in the upper metal layer and being substantially the same size or smaller than the holes in the upper metal layer; forming the bond pad over the passivation layer; characterised in that the step of forming the bond pad comprises introducing some of the material from the bond pad into the holes in the passivation layer and upper metal layer when forming the bond pad, securing the bond pad to the passivation layer by allowing said material to flow under the surface thereof and attach thereto without attaching to the upper metal layer to thereby form a securing means.
Public/Granted literature
- US20100019395A1 METHOD AND APPARATUS FOR IMPROVEMENTS IN CHIP MANUFACTURE AND DESIGN Public/Granted day:2010-01-28
Information query
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