Invention Grant
- Patent Title: Method of forming micro pattern of semiconductor device
- Patent Title (中): 形成半导体器件微图案的方法
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Application No.: US12016771Application Date: 2008-01-18
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Publication No.: US07955985B2Publication Date: 2011-06-07
- Inventor: Woo Yung Jung , Yong Chul Shin
- Applicant: Woo Yung Jung , Yong Chul Shin
- Applicant Address: KR Icheon-si
- Assignee: Hynix Semiconductor Inc.
- Current Assignee: Hynix Semiconductor Inc.
- Current Assignee Address: KR Icheon-si
- Agency: Kilpatrick Townsend & Stockton LLP
- Priority: KR10-2007-0065045 20070629
- Main IPC: H01L21/302
- IPC: H01L21/302 ; H01L21/461

Abstract:
A method for fabricating a semiconductor device includes forming a target etch layer over a substrate, a first auxiliary layer over the target etch layer, an isolation layer over the first auxiliary layer, and a second auxiliary layer over the isolation layer. A first exposure process is performed, where the first auxiliary layer is in focus and the second auxiliary layer is out of focus. A second exposure process is performed, where the second auxiliary layer in focus and the first auxiliary layer is out of focus. The second auxiliary layer is developed to form first mask patterns. The isolation layer and the first auxiliary layer are etched by using the first mask patterns to form second mask patterns. The second mask patterns are developed to form third mask patterns that are used to facilitate subsequent etching of the target etch layer.
Public/Granted literature
- US20090004866A1 METHOD OF FORMING MICRO PATTERN OF SEMICONDUCTOR DEVICE Public/Granted day:2009-01-01
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