Invention Grant
- Patent Title: Memory array having floating gate semiconductor device
- Patent Title (中): 具有浮置栅极半导体器件的存储器阵列
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Application No.: US11933728Application Date: 2007-11-01
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Publication No.: US07956396B2Publication Date: 2011-06-07
- Inventor: Trung Tri Doan , Tyler A. Lowrey
- Applicant: Trung Tri Doan , Tyler A. Lowrey
- Applicant Address: US NY Mt. Kisco
- Assignee: Round Rock Research, LLC
- Current Assignee: Round Rock Research, LLC
- Current Assignee Address: US NY Mt. Kisco
- Agency: Lerner, David, Littenberg, Krumholz & Mentlik, LLP
- Main IPC: H01L27/108
- IPC: H01L27/108 ; H01L29/76 ; H01L29/94 ; H01L31/119

Abstract:
A method for forming a floating gate semiconductor device such as an electrically erasable programmable read only memory is provided. The device includes a silicon substrate having an electrically isolated active area. A gate oxide, as well as other components of a FET (e.g., source, drain) are formed in the active area. A self aligned floating gate is formed by depositing a conductive layer (e.g., polysilicon) into the recess and over the gate oxide. The conductive layer is then chemically mechanically planarized to an endpoint of the isolation layer so that all of the conductive layer except material in the recess and on the gate oxide is removed. Following formation of the floating gate an insulating layer is formed on the floating gate and a control gate is formed on the insulating layer.
Public/Granted literature
- US20080054342A1 Memory array having floating gate semiconductor device Public/Granted day:2008-03-06
Information query
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