Invention Grant
- Patent Title: Double-doped polysilicon floating gate
- Patent Title (中): 双掺杂多晶硅浮栅
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Application No.: US11970843Application Date: 2008-01-11
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Publication No.: US07956402B2Publication Date: 2011-06-07
- Inventor: Chun Chen , Kirk D. Prall
- Applicant: Chun Chen , Kirk D. Prall
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Leffert Jay & Polglaze, P.A.
- Main IPC: H01L29/788
- IPC: H01L29/788

Abstract:
The present invention provides a method and apparatus for forming a double-doped polysilicon floating gate in a semiconductor memory element. The method includes forming a first dielectric layer on a semiconductor substrate and forming a floating gate above the first dielectric layer, the floating gate comprised of a first layer doped with a first type of dopant material and a second layer doped with a second type of dopant material that is opposite the first type of dopant material in the first layer. The method further includes forming a second dielectric layer above the floating gate, forming a control gate above the second dielectric layer, and forming a source and a drain in the substrate.
Public/Granted literature
- US20080128782A1 DOUBLE-DOPED POLYSILICON FLOATING GATE Public/Granted day:2008-06-05
Information query
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