Invention Grant
- Patent Title: Semiconductor device having trench gate structure
- Patent Title (中): 具有沟槽栅结构的半导体器件
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Application No.: US12232074Application Date: 2008-09-10
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Publication No.: US07956409B2Publication Date: 2011-06-07
- Inventor: Hideo Yamamoto , Kenya Kobayashi , Atsushi Kaneko
- Applicant: Hideo Yamamoto , Kenya Kobayashi , Atsushi Kaneko
- Applicant Address: JP Kawasaki-shi, Kanagawa
- Assignee: Renesas Electronics Corporation
- Current Assignee: Renesas Electronics Corporation
- Current Assignee Address: JP Kawasaki-shi, Kanagawa
- Agency: McGinn IP Law Group PLLC
- Priority: JP2007-242011 20070919
- Main IPC: H01L29/76
- IPC: H01L29/76 ; H01L29/94 ; H01L31/062 ; H01L31/113 ; H01L31/119

Abstract:
The present invention provides a vertical MOSFET which has striped trench gate structure which can secure avalanche resistance without increasing Ron. A vertical MOSFET 100 comprises a plurality of gate trenches 7 which is arranged in stripes, an array which is sandwiched with the plurality of gate trenches 7 and includes N+ source regions 4N+ and P+ base contact regions 5P+, and a diode region (anode region 6P+) which is formed so as to contact with two gate trenches 7. The N+ source regions 4N+ and the base contact regions 5P+ are alternately arranged along a longitudinal direction of the gate trench 7. Size of the diode region (anode region 6P+) corresponds to at least one of the N+ source regions 4N+ and two of the P+ base contact regions 5P+.
Public/Granted literature
- US20090072300A1 Semiconductor device having trench gate structure Public/Granted day:2009-03-19
Information query
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