Invention Grant
- Patent Title: Semiconductor device with trench gate and method of manufacturing the same
- Patent Title (中): 具有沟槽栅的半导体器件及其制造方法
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Application No.: US12453888Application Date: 2009-05-26
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Publication No.: US07956423B2Publication Date: 2011-06-07
- Inventor: Takao Arai
- Applicant: Takao Arai , Sachiko Shirai, legal representative
- Applicant Address: JP Kawasaki-shi, Kanagawa
- Assignee: Renesas Electronics Corporation
- Current Assignee: Renesas Electronics Corporation
- Current Assignee Address: JP Kawasaki-shi, Kanagawa
- Agency: McGinn IP Law Group, PLLC
- Priority: JP2008-137710 20080527
- Main IPC: H01L21/8248
- IPC: H01L21/8248 ; H01L29/66

Abstract:
A method of a semiconductor device, which includes an insulated-gate FET and an electronic element, includes three steps. The first step is the step of forming a trench gate of the insulated-gate FET in a first region of a semiconductor base and a trench element-isolation layer in a second region of the semiconductor base, simultaneously. The second step is the step of forming a first diffusion layer of the insulated-gate FET on a side of the trench gate and a second diffusion layer of the electronic element in a region surrounded by the trench element-isolation layer, simultaneously. The third step is the step of forming a third diffusion layer of the insulated-gate FET in the first diffusion layer and a fourth diffusion layer of the electronic element in the second diffusion layer, simultaneously.
Public/Granted literature
- US20090294870A1 Semiconductor device with trench gate and method of manufacturing the same Public/Granted day:2009-12-03
Information query
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