Invention Grant
US07956680B2 Low-noise DC offset calibration circuit and related receiver stage
有权
低噪声直流偏移校准电路及相关接收器级
- Patent Title: Low-noise DC offset calibration circuit and related receiver stage
- Patent Title (中): 低噪声直流偏移校准电路及相关接收器级
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Application No.: US12767812Application Date: 2010-04-27
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Publication No.: US07956680B2Publication Date: 2011-06-07
- Inventor: Chi-Lun Lo , Yu-Hsin Lin
- Applicant: Chi-Lun Lo , Yu-Hsin Lin
- Applicant Address: TW Science-Based Industrial Park, Hsin-Chu
- Assignee: Mediatek Inc.
- Current Assignee: Mediatek Inc.
- Current Assignee Address: TW Science-Based Industrial Park, Hsin-Chu
- Agent Winston Hsu; Scott Margo
- Main IPC: H03F1/02
- IPC: H03F1/02
Abstract:
A DC offset calibration circuit has a first resistor, a first switch, a second resistor, and a second switch. The first resistor is coupled to a first supply voltage. The first switch is coupled to the first resistor, to a first input of an amplifier, and to a first input resistor. A second end of the first input resistor is not coupled to the first supply voltage. The second resistor is coupled to a second supply voltage. The second switch is coupled to the second resistor, to a second input of the amplifier, and to a first end of a second input resistor. A second end of the second input resistor is not coupled to the second supply voltage.
Public/Granted literature
- US20100201423A1 Low-noise DC Offset Calibration Circuit and Related Receiver Stage Public/Granted day:2010-08-12
Information query
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