Invention Grant
US07957190B2 Memory having P-type split gate memory cells and method of operation 有权
具有P型分离栅极存储单元的存储器及其操作方法

Memory having P-type split gate memory cells and method of operation
Abstract:
A memory comprising a plurality of P-channel split-gate memory cells are organized in rows and columns. Each of the plurality of P-channel split-gate memory cells comprises a select gate, a control gate, a source region, a drain region, a channel region, and a charge storage layer comprising nanocrystals. Programming a memory cell of the plurality of P-channel split-gate memory cells comprises injecting electrons from a channel region of the memory cell to the charge storage layer. Erasing the memory cell comprises injecting holes from the channel region to the charge storage region.
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