Invention Grant
US07960280B2 Process method to fully salicide (FUSI) both N-poly and P-poly on a CMOS flow
有权
在CMOS流程上完全自对准(FUSI)N聚和P-poly的工艺方法
- Patent Title: Process method to fully salicide (FUSI) both N-poly and P-poly on a CMOS flow
- Patent Title (中): 在CMOS流程上完全自对准(FUSI)N聚和P-poly的工艺方法
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Application No.: US11844832Application Date: 2007-08-24
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Publication No.: US07960280B2Publication Date: 2011-06-14
- Inventor: Freidoon Mehrad , Frank S. Johnson
- Applicant: Freidoon Mehrad , Frank S. Johnson
- Applicant Address: US TX Dallas
- Assignee: Texas Instruments Incorporated
- Current Assignee: Texas Instruments Incorporated
- Current Assignee Address: US TX Dallas
- Agent Warren L. Franz; Wade J. Brady, III; Frederick J. Telecky, Jr.
- Main IPC: H01L21/44
- IPC: H01L21/44

Abstract:
An improved method of forming a fully silicided (FUSI) gate in both NMOS and PMOS transistors of the same MOS device is disclosed. In one example, the method comprises forming a first silicide in at least a top portion of a gate electrode of the PMOS devices and not over the NMOS devices. The method further comprises concurrently forming a second silicide in at least a top portion of a gate electrode of both the NMOS and PMOS devices, and forming a FUSI gate silicide of the gate electrodes. In one embodiment, the thickness of the second silicide is greater than the first silicide by an amount which compensates for a difference in the rates of silicide formation between the NMOS and PMOS devices.
Public/Granted literature
- US20090050976A1 PROCESS METHOD TO FULLY SALICIDE (FUSI) BOTH N-POLY AND P-POLY ON A CMOS FLOW Public/Granted day:2009-02-26
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