Invention Grant
- Patent Title: Semiconductor device having element isolation region
- Patent Title (中): 具有元件隔离区的半导体器件
-
Application No.: US12273163Application Date: 2008-11-18
-
Publication No.: US07960796B2Publication Date: 2011-06-14
- Inventor: Satoshi Rittaku
- Applicant: Satoshi Rittaku
- Applicant Address: JP Kanagawa
- Assignee: Renesas Electronics Corporation
- Current Assignee: Renesas Electronics Corporation
- Current Assignee Address: JP Kanagawa
- Agency: McDermott Will & Emery LLP
- Priority: JP2001-197190 20010628
- Main IPC: H01L21/8238
- IPC: H01L21/8238

Abstract:
An n-type buried diffusion layer is formed on the surface layer of the prescribed area of a p-type silicon substrate, and a p-type first high-concentration isolation diffusion layer is formed in the silicon substrate so as to surround the buried diffusion layer. An n-type epitaxial layer is formed on the silicon substrate, the buried diffusion layer, and the first high-concentration isolation diffusion layer. A p-type second high-concentration isolation diffusion layer is formed in the epitaxial layer on the first high-concentration isolation diffusion layer. A p-type low-concentration isolation diffusion layer for isolating the epitaxial layer into a plurality of island regions is formed in the epitaxial layer on the second high-concentration isolation diffusion layer.
Public/Granted literature
- US20090127631A1 SEMICONDUCTOR DEVICE HAVING ELEMENT ISOLATION REGION AND METHOD FOR MANUFACTURE THEREOF Public/Granted day:2009-05-21
Information query
IPC分类: