Invention Grant
- Patent Title: Electrical test structure and method for characterization of deep trench sidewall reliability
- Patent Title (中): 用于表征深沟侧壁可靠性的电气测试结构和方法
-
Application No.: US12212289Application Date: 2008-09-17
-
Publication No.: US07960998B2Publication Date: 2011-06-14
- Inventor: Lisa V. Rozario , Andy Strachan , Richard Orr
- Applicant: Lisa V. Rozario , Andy Strachan , Richard Orr
- Applicant Address: US CA Santa Clara
- Assignee: National Semiconductor Corporation
- Current Assignee: National Semiconductor Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Dergosits & Noah LLP
- Main IPC: G01R31/02
- IPC: G01R31/02

Abstract:
A test structure and testing method are provided for characterizing the time-dependent drift in the parasitic PFET leakage current that flows along the sidewall of a deep trench isolation structure from the P-type active area to the P-type substrate in a semiconductor integrated circuit structure. The capacitive coupling characteristics of the deep trench isolation structure are used to control the electrical “bias” of the deep trench structure through the use of a large auxiliary trench mesh network that is formed as part of the deep trench structure. The trench mesh network can be placed adjacent to a Vdd ring or a ground ring and then, by using a ratioed capacitive voltage dividing network, the electrical potential at the trench can be controlled.
Public/Granted literature
- US20090206865A1 ELECTRICAL TEST STRUCTURE AND METHOD FOR CHARACTERIZATION OF DEEP TRENCH SIDEWALL RELIABILITY Public/Granted day:2009-08-20
Information query