Invention Grant
- Patent Title: Amplifier with compensated gate bias
- Patent Title (中): 具有补偿栅极偏置的放大器
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Application No.: US12095731Application Date: 2006-12-04
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Publication No.: US07961049B2Publication Date: 2011-06-14
- Inventor: Erik Bert Busking , Andries Peter De Hek
- Applicant: Erik Bert Busking , Andries Peter De Hek
- Applicant Address: NL Delft
- Assignee: Nederlandse Organisatie voor toegepast-natuurwetenschappelijk onderzoek TNO
- Current Assignee: Nederlandse Organisatie voor toegepast-natuurwetenschappelijk onderzoek TNO
- Current Assignee Address: NL Delft
- Agency: Leydig, Voit & Mayer, Ltd
- Priority: EP05077761 20051202
- International Application: PCT/NL2006/000608 WO 20061204
- International Announcement: WO2007/064201 WO 20070607
- Main IPC: H03F3/04
- IPC: H03F3/04

Abstract:
An amplifier circuit includes an amplifier stage (10) having an amplifier transistor (104) with a gate coupled to an input (100) of the amplifier stage, a source coupled to a reference connection (gnd) and a drain coupled to a positive power supply connection (V+). The amplifier circuit includes a bias stage (12) having a bias transistor (120), a drain resistance (124) and a source resistance (122). The bias transistor includes a gate coupled to a negative power supply connection (V−), a source coupled to the negative power supply connection (V−) via the source resistance and a drain coupled to the reference connection via the drain resistance and to the gate of the amplifier transistor. The bias stage includes a further resistance (20, 22) coupled from a node between the source of the bias transistor and the source resistance of the bias transistor to a circuit node that carries a voltage higher than the voltage at the negative power supply connection.
Public/Granted literature
- US20100066453A1 AMPLIFIER WITH COMPENSATED GATE BIAS Public/Granted day:2010-03-18
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