A parallel based 5 bypass bin CABAC decoder may include a 3 bypass bins decoder appropriately coupled to a 2 bypass bins decoder. The 3 bypass bins decoder may have a first input receiving a bitstream, a second input receiving range values, a first output outputting a first bypass bin, a second output outputting a second bypass bin, a third output outputting a third bypass bin, and a fourth output outputting a shifted bitstream to the 2 bypass bins decoder. The 2 bypass bins decoder may have a first input to receive the shifted bitstream, a second input to receive the range values, a first output outputting a fourth bypass bin, and a second output outputting a fifth bypass bin.