Invention Grant
US07961528B2 Buffer control circuit of memory device 有权
存储器件的缓冲器控制电路

Buffer control circuit of memory device
Abstract:
A buffer control circuit of a memory device has an auto-refresh buffer controller configured to detect a data training operation in an auto-refresh mode and a controller configured to enable an input buffer in response to an enable signal generated in the data training operation by the auto-refresh buffer controller.
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