Invention Grant
- Patent Title: Communication semiconductor integrated circuit, radio communication system, and adjustment method of gain and offset
- Patent Title (中): 通信半导体集成电路,无线电通信系统以及增益和偏移调整方法
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Application No.: US12276532Application Date: 2008-11-24
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Publication No.: US07961821B2Publication Date: 2011-06-14
- Inventor: Toshihito Habuka , Naoto Inokawa , Kiyoharu Ozaki , Tatsuji Matsuura , Koichi Yahagi
- Applicant: Toshihito Habuka , Naoto Inokawa , Kiyoharu Ozaki , Tatsuji Matsuura , Koichi Yahagi
- Applicant Address: JP Kanagawa
- Assignee: Renesas Electronics Corporation
- Current Assignee: Renesas Electronics Corporation
- Current Assignee Address: JP Kanagawa
- Agency: Mattingly & Malur, P.C.
- Priority: JP2003-178984 20030624
- Main IPC: H04L27/08
- IPC: H04L27/08

Abstract:
A D.C. offset canceling and gain adjusting techniques permitting completion of correction of D.C. offsets and gain adjustment of amplifiers for amplifying reception signals in a radio communication system are provided. A communication semiconductor integrated circuit has a plurality of low-pass filters and variable gain amplifiers which are alternately connected in multiple stages, and high gain amplifier circuits for amplifying reception signals to a predetermined amplitude level. Offset cancellation values are generated by detecting D.C. offsets of amplifiers for amplifying reception signals according to a set gain, and stored into a memory, and read out of the memory to cancel the D.C. offsets of the amplifiers when starting reception and altering the gain. Gain setting in a high gain amplifying section is accomplished using rough and precise settings.
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