Invention Grant
US07961872B2 Flexible hardware architecture for ECC/HECC based cryptography
失效
灵活的基于ECC / HECC的密码学硬件架构
- Patent Title: Flexible hardware architecture for ECC/HECC based cryptography
- Patent Title (中): 灵活的基于ECC / HECC的密码学硬件架构
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Application No.: US11999211Application Date: 2007-12-04
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Publication No.: US07961872B2Publication Date: 2011-06-14
- Inventor: Anatoli A. Bolotov , Mlkhail I. Grinchuk , Paul G. Filseth , Lav D. Ivanovic
- Applicant: Anatoli A. Bolotov , Mlkhail I. Grinchuk , Paul G. Filseth , Lav D. Ivanovic
- Applicant Address: US CA Milpitas
- Assignee: LSI Corporation
- Current Assignee: LSI Corporation
- Current Assignee Address: US CA Milpitas
- Agency: Luedeka, Neely & Graham, P.C.
- Main IPC: H04L9/28
- IPC: H04L9/28

Abstract:
A circuit for implementing elliptic curve and hyperelliptic curve encryption and decryption operations, having a read only memory with no more than about two kilobytes of accessible memory, containing first programming instructions. An arithmetic logic unit has access to second programming instructions that are resident in a gate-level program disposed in the arithmetic logic unit, and is operable to receive data from no more than one input FIFO register. A microcontroller has no more than about two thousand gates, and is adapted to read the first programming instructions from the read only memory, send control signals to the arithmetic logic unit, and receive flags from the arithmetic logic unit. The arithmetic unit reads the third programming instructions, selectively performs elliptic curve and hyperelliptic curve encryption and decryption operations on the data according to the second programming instructions and the microcontroller, and sends output to no more than one output FIFO register.
Public/Granted literature
- US20080130873A1 Flexible hardware architecture for ECC/HECC based crytography Public/Granted day:2008-06-05
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