Invention Grant
US07962817B2 IEEE 1149.1 and P1500 test interfaces combined circuits and processes 有权
IEEE 1149.1和P1500测试接口组合电路和过程

  • Patent Title: IEEE 1149.1 and P1500 test interfaces combined circuits and processes
  • Patent Title (中): IEEE 1149.1和P1500测试接口组合电路和过程
  • Application No.: US12970112
    Application Date: 2010-12-16
  • Publication No.: US07962817B2
    Publication Date: 2011-06-14
  • Inventor: Lee D. Whetsel
  • Applicant: Lee D. Whetsel
  • Applicant Address: US TX Dallas
  • Assignee: Texas Instruments Incorporated
  • Current Assignee: Texas Instruments Incorporated
  • Current Assignee Address: US TX Dallas
  • Agent Lawrence J. Bassuk; W. James Brady; Frederick J. Telecky, Jr.
  • Main IPC: G01R31/28
  • IPC: G01R31/28
IEEE 1149.1 and P1500 test interfaces combined circuits and processes
Abstract:
In a first embodiment a TAP of IEEE standard 1149.1 is allowed to commandeer control from a WSP of IEEE standard P1500 such that the P1500 architecture, normally controlled by the WSP, is rendered controllable by the TAP. In a second embodiment (1) the TAP and WSP based architectures are merged together such that the sharing of the previously described architectural elements are possible, and (2) the TAP and WSP test interfaces are merged into a single optimized test interface that is operable to perform all operations of each separate test interface. One approach provides for the TAP to maintain access and control of the TAP instruction register, but provides for a selected data register to be accessed and controlled by either the TAP+ATC or by the discrete CaptureDR, UpdateDR, TransferDR, ShiftDR, and ClockDR WSP data register control signals.
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