Invention Grant
- Patent Title: Test mode soft reset circuitry and methods
- Patent Title (中): 测试模式软复位电路和方法
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Application No.: US12019534Application Date: 2008-01-24
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Publication No.: US07962819B2Publication Date: 2011-06-14
- Inventor: Baojing Liu , Matt Davidson , Vladimir Kovalev
- Applicant: Baojing Liu , Matt Davidson , Vladimir Kovalev
- Applicant Address: US CA Milpitas
- Assignee: SanDisk Corporation
- Current Assignee: SanDisk Corporation
- Current Assignee Address: US CA Milpitas
- Agency: Martine Penilla & Gencarella, LLP
- Main IPC: G01R31/28
- IPC: G01R31/28 ; G06F11/00

Abstract:
An integrated circuit chip includes a scan-in pin, a scan clock pin, and a test controller. The scan-in pin and the scan clock pin receive a test program for the type of test mode and a soft-reset pattern. A state machine is configured to direct sampling of a scan clock waveform provided through the scan clock pin as dictated by transitions of a scan-in waveform provided through the scan-in pin. The state machine identifies a bit match from the sampled scan clock waveform upon executing the soft-reset pattern. The identified bit match triggers a soft reset which eliminates the need for an extra reset pin, when testing in scan mode.
Public/Granted literature
- US20090193305A1 TEST MODE SOFT RESET CIRCUITRY AND METHODS Public/Granted day:2009-07-30
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