Invention Grant
- Patent Title: Method of forming metal wiring of nonvolatile memory device
- Patent Title (中): 形成非易失性存储器件金属布线的方法
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Application No.: US12345612Application Date: 2008-12-29
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Publication No.: US07964491B2Publication Date: 2011-06-21
- Inventor: Yong Chul Shin , Tae Kyung Kim
- Applicant: Yong Chul Shin , Tae Kyung Kim
- Applicant Address: KR Icheon-si, Gyeonggi-do
- Assignee: Hynix Semiconductor Inc.
- Current Assignee: Hynix Semiconductor Inc.
- Current Assignee Address: KR Icheon-si, Gyeonggi-do
- Agency: Lowe Hauptman Ham & Berner LLP
- Priority: KR10-2008-6150 20080121; KR10-2008-75700 20080801
- Main IPC: H01L21/44
- IPC: H01L21/44

Abstract:
A method of forming metal wirings of a nonvolatile memory device include forming a first insulating layer over a semiconductor substrate including a first junction area and a second junction area, forming first and second contact holes through which the first and second junction areas are respectively exposed in the first insulating layer, forming first and second contact plugs within the first and second contact holes, etching a part of the second contact plug, thus forming a recess, forming a second insulating layer to fill the recess, forming a third insulating layer over the semiconductor substrate including the first and second insulating layers, forming a first trench through which the first contact plug is exposed a second trench through which the second contact plug is exposed by etching the third insulating layer, and forming first and second metal wirings within the first and second trenches, respectively.
Public/Granted literature
- US20090186477A1 METHOD OF FORMING METAL WIRING OF NONVOLATILE MEMORY DEVICE Public/Granted day:2009-07-23
Information query
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