Invention Grant
- Patent Title: Non-volatile single-event upset tolerant latch circuit
- Patent Title (中): 非易失性单事件容错锁存电路
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Application No.: US12525458Application Date: 2008-11-25
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Publication No.: US07965541B2Publication Date: 2011-06-21
- Inventor: Bin Li , John C. Rodgers , Nadim F. Haddad
- Applicant: Bin Li , John C. Rodgers , Nadim F. Haddad
- Applicant Address: US NH Nashua US MI Rochester Hills
- Assignee: BAE Systems Information and Electronic Systems Integration Inc.,Ovonyx, Inc.
- Current Assignee: BAE Systems Information and Electronic Systems Integration Inc.,Ovonyx, Inc.
- Current Assignee Address: US NH Nashua US MI Rochester Hills
- Agency: Dillon & Yudell, LLP
- Agent Antony P. Ng; Daniel J. Long
- International Application: PCT/US2008/084714 WO 20081125
- International Announcement: WO2009/070595 WO 20090604
- Main IPC: G11C11/00
- IPC: G11C11/00

Abstract:
A non-volatile single-event upset (SEU) tolerant latch is disclosed. The non-volatile SEU tolerant latch includes a first and second inverters connected to each other in a cross-coupled manner. The gates of transistors within the first inverter are connected to the drains of transistors within the second inverter via a first feedback resistor. Similarly, the gates of transistors within the second inverter are connected to the drains of transistors within the first inverter via a second feedback resistor. The non-volatile SEU tolerant latch also includes a pair of chalcogenide memory elements connected to the inverters for storing information.
Public/Granted literature
- US20100027321A1 Non-Volatile Single-Event Upset Tolerant Latch Circuit Public/Granted day:2010-02-04
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