Invention Grant
- Patent Title: Method for reducing number of writes in a cache memory
- Patent Title (中): 减少高速缓冲存储器中的写入次数的方法
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Application No.: US11863770Application Date: 2007-09-28
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Publication No.: US07966456B2Publication Date: 2011-06-21
- Inventor: Sanjeev N. Trika , Rick Mangold , Andrew Vogan
- Applicant: Sanjeev N. Trika , Rick Mangold , Andrew Vogan
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Grossman, Tucker, Perreault & Pfleger, PLLC
- Main IPC: G06F12/00
- IPC: G06F12/00

Abstract:
Disclosed is a method for reducing number of writes in a write-back non-volatile cache memory. The method comprises: writing a plurality of data in the cache memory, wherein cache lines meta data for each of the plurality of data is marked as dirty; determining a set of data of the plurality of the data in the cache memory to be flushed to a hard disk, wherein the hard disk is operatively coupled to the cache memory; flushing the set of data of the plurality of data to the hard disk from the cache memory; and writing a clean-marker to the cache memory specifying which of the plurality of the data has been flushed to the disk.
Public/Granted literature
- US20090089508A1 METHOD FOR REDUCING NUMBER OF WRITES IN A CACHE MEMORY Public/Granted day:2009-04-02
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