Invention Grant
- Patent Title: Semiconductor integrated circuit and method of fabricating same
- Patent Title (中): 半导体集成电路及其制造方法
-
Application No.: US12361923Application Date: 2009-01-29
-
Publication No.: US07968886B2Publication Date: 2011-06-28
- Inventor: Hideomi Suzawa , Yasuhiko Takemura
- Applicant: Hideomi Suzawa , Yasuhiko Takemura
- Applicant Address: JP Atsugi-shi, Kanagawa-ken
- Assignee: Semiconductor Energy Laboratory Co., Ltd.
- Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
- Current Assignee Address: JP Atsugi-shi, Kanagawa-ken
- Agency: Robinson Intellectual Property Law Office, P.C.
- Agent Eric J. Robinson
- Priority: JP6-137988 19940526
- Main IPC: H01L21/00
- IPC: H01L21/00

Abstract:
A semiconductor integrated circuit comprising thin-film transistors in each of which the second wiring is prevented from breaking at steps. A silicon nitride film is formed on gate electrodes and on gate wiring extending from the gate electrodes. Substantially triangular regions are formed out of an insulator over side surfaces of the gate electrodes and of the gate wiring. The presence of these substantially triangular side walls make milder the steps at which the second wiring goes over the gate wiring. This suppresses breakage of the second wiring.
Public/Granted literature
- US20090134462A1 SEMICONDUCTOR INTEGRATED CIRCUIT AND METHOD OF FABRICATING SAME Public/Granted day:2009-05-28
Information query
IPC分类: