Invention Grant
- Patent Title: Trench isolation structure in a semiconductor device and method for fabricating the same
- Patent Title (中): 半导体器件中的沟槽隔离结构及其制造方法
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Application No.: US12339589Application Date: 2008-12-19
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Publication No.: US07968948B2Publication Date: 2011-06-28
- Inventor: Byung Soo Eun
- Applicant: Byung Soo Eun
- Applicant Address: KR Icheon-si
- Assignee: Hynix Semiconductor Inc.
- Current Assignee: Hynix Semiconductor Inc.
- Current Assignee Address: KR Icheon-si
- Agency: Kilpatrick Townsend & Stockton LLP
- Priority: KR2005-41824 20050518
- Main IPC: H01L29/76
- IPC: H01L29/76 ; H01L31/062

Abstract:
A trench isolation structure in a semiconductor device is provided. A semiconductor substrate has cell regions and peripheral circuit regions. First trenches have a predetermined depth and are formed in the semiconductor substrate at the cell regions. A first sidewall oxide film is formed overlying the first trenches. A first liner nitride film is formed overlying the first sidewall oxide film. Second trenches have a predetermined depth and are formed in the semiconductor substrate at the peripheral circuit regions. A second sidewall oxide film is formed overlying the second trenches. An oxide film fills the first overlying second trenches. A second liner nitride film formed on the filling oxide film. The second liner nitride film is separated from the sidewalls of the first and second trenches.
Public/Granted literature
- US20090127650A1 TRENCH ISOLATION STRUCTURE IN A SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME Public/Granted day:2009-05-21
Information query
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