Invention Grant
- Patent Title: System and method for reducing lock time in a phase-locked loop
- Patent Title (中): 减少锁相环锁定时间的系统和方法
-
Application No.: US11958189Application Date: 2007-12-17
-
Publication No.: US07969252B2Publication Date: 2011-06-28
- Inventor: Shizhong Mei
- Applicant: Shizhong Mei
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Dorsey & Whitney LLP
- Main IPC: H03L7/081
- IPC: H03L7/081

Abstract:
Increasing loop gain is a common practice for reducing lock time of phase locked loops. Very high loop gains, however, often result in increasing the lock time or causing loop instability. For very high loop gains, delaying the feedback clock signal along the feedback path of a phase locked loop decreases lock time and prevents instability. A delay circuit may be used at any location along the feedback path of the phase locked loop.
Public/Granted literature
- US20090153253A1 SYSTEM AND METHOD FOR REDUCING LOCK TIME IN A PHASE-LOCKED LOOP Public/Granted day:2009-06-18
Information query