Invention Grant
- Patent Title: Multiple memory standard physical layer macro function
- Patent Title (中): 多内存标准物理层宏功能
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Application No.: US12109643Application Date: 2008-04-25
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Publication No.: US07969799B2Publication Date: 2011-06-28
- Inventor: Derrick Sai-Tang Butt , Cheng-Gang Kong , Terence J. Magee , Thomas Hughes
- Applicant: Derrick Sai-Tang Butt , Cheng-Gang Kong , Terence J. Magee , Thomas Hughes
- Applicant Address: US CA Milpitas
- Assignee: LSI Corporation
- Current Assignee: LSI Corporation
- Current Assignee Address: US CA Milpitas
- Agency: Christopher P. Maiorana, PC
- Main IPC: G11C7/10
- IPC: G11C7/10 ; G11C7/00 ; G11C8/00 ; G11C8/18
Abstract:
A memory interface physical layer macro including one or more embedded input/output (I/O) buffers, one or more memory interface hardmacros and control logic. The one or more embedded input/output (I/O) buffers support a plurality of I/O supply voltage levels. The one or more memory interface hardmacros are coupled to the one or more embedded I/O buffers. The control logic controls the one or more hardmacros and the one or more I/O buffers.
Public/Granted literature
- US20090091987A1 Multiple memory standard physical layer macro function Public/Granted day:2009-04-09
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