Invention Grant
- Patent Title: Method of interconnecting workpieces
- Patent Title (中): 互连工件的方法
-
Application No.: US12215550Application Date: 2008-06-27
-
Publication No.: US07971347B2Publication Date: 2011-07-05
- Inventor: Leonel Arana , Rob Nickerson , Lim Chong Sim , Edward Prack , Yoshihiro Tomita
- Applicant: Leonel Arana , Rob Nickerson , Lim Chong Sim , Edward Prack , Yoshihiro Tomita
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agent Scott M. Lane
- Main IPC: H05K3/30
- IPC: H05K3/30

Abstract:
Embodiments of an apparatus and methods of forming a package on package interconnect and its application to the packaging of microelectronic devices are described herein. Other embodiments may be described and claimed.
Public/Granted literature
- US20090320281A1 Apparatus and methods of forming package-on-package interconnects Public/Granted day:2009-12-31
Information query