Invention Grant
- Patent Title: Method for manufacturing component-embedded substrate
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Application No.: US12348358Application Date: 2009-01-05
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Publication No.: US07971348B2Publication Date: 2011-07-05
- Inventor: Yusuke Yamakoshi
- Applicant: Yusuke Yamakoshi
- Applicant Address: JP Kyoto
- Assignee: Murata Manufacturing Co., Ltd.
- Current Assignee: Murata Manufacturing Co., Ltd.
- Current Assignee Address: JP Kyoto
- Agency: Keating & Bennett, LLP
- Priority: JP2007-161513 20070619
- Main IPC: H05K3/30
- IPC: H05K3/30

Abstract:
A component-embedded substrate includes a component embedded in an uncured resin layer of a second layer. After curing the resin layer, a hole passing through the second layer in the vertical direction is formed. The hole is filled with an electroconductive paste to form a second interlayer connection conductor. A first in-plane conductor including a plurality of lands, a first layer, and the second layer are respectively stacked in that order and pressed to join together, and the first layer is heated to form an integrated structure. A method for manufacturing the component-embedded substrate can form an interlayer connection conductor having a small diameter and high straightness and thus can achieve a miniaturized component-embedded substrate including interlayer connection conductors at a narrow pitch.
Public/Granted literature
- US20090101400A1 METHOD FOR MANUFACTURING COMPONENT-EMBEDDED SUBSTRATE AND COMPONENT-EMBEDDED SUBSTRATE Public/Granted day:2009-04-23
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