Invention Grant
- Patent Title: Manufacturing method of integrated circuit device including thin film transistor
- Patent Title (中): 包括薄膜晶体管的集成电路器件的制造方法
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Application No.: US11442225Application Date: 2006-05-30
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Publication No.: US07972910B2Publication Date: 2011-07-05
- Inventor: Koji Dairiki , Naoto Kusumoto , Takuya Tsurume
- Applicant: Koji Dairiki , Naoto Kusumoto , Takuya Tsurume
- Applicant Address: JP Atsugi-shi, Kanagawa-ken
- Assignee: Semiconductor Energy Laboratory Co., Ltd.
- Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
- Current Assignee Address: JP Atsugi-shi, Kanagawa-ken
- Agency: Robinson Intellectual Property Law Office, P.C.
- Agent Eric J. Robinson
- Priority: JP2005-164605 20050603
- Main IPC: H01L21/46
- IPC: H01L21/46
Abstract:
It is an object of the present invention to improve a factor which influences productivity such as variation caused by a characteristic defect of a circuit by thinning or production yield when an integrated circuit device in which a substrate is thinned is manufactured. A stopper layer is formed over one surface of a substrate, and an element is formed over the stopper layer, and then, the substrate is thinned from the other surface thereof. A method in which a substrate is ground or polished or a method in which the substrate is etched by chemical reaction is used as a method for thinning or removing the substrate.
Public/Granted literature
- US20060273319A1 Integrated circuit device and manufacturing method thereof Public/Granted day:2006-12-07
Information query
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