Invention Grant
- Patent Title: Method for manufacturing semiconductor device and semiconductor device
- Patent Title (中): 半导体器件和半导体器件的制造方法
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Application No.: US12492080Application Date: 2009-06-25
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Publication No.: US07972917B2Publication Date: 2011-07-05
- Inventor: Tomoyuki Furuhata , Hideyuki Akanuma , Hiroaki Nitta
- Applicant: Tomoyuki Furuhata , Hideyuki Akanuma , Hiroaki Nitta
- Applicant Address: JP Tokyo
- Assignee: Seiko Epson Corporation
- Current Assignee: Seiko Epson Corporation
- Current Assignee Address: JP Tokyo
- Agency: Kilpatrick Townsend & Stockton LLP
- Priority: JP2008-174350 20080703
- Main IPC: H01L21/8238
- IPC: H01L21/8238

Abstract:
A method for manufacturing a semiconductor device is disclosed. The method includes: forming a LDMOS region, an offset drain MOS region, and a CMOS region; simultaneously forming a first well in the LDMOS region and the offset drain MOS region; simultaneously forming a second well in the first well of the LDMOS region and the CMOS region; and forming a second well in the CMOS region, wherein a depth of the first well is larger than a depth of the second well and the second well is a retrograde well formed by a high energy ion implantation method.
Public/Granted literature
- US20100001342A1 METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE Public/Granted day:2010-01-07
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