Invention Grant
- Patent Title: Fabrication of semiconductor architecture having field-effect transistors especially suitable for analog applications
- Patent Title (中): 具有特别适用于模拟应用的场效应晶体管的半导体架构的制造
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Application No.: US12545014Application Date: 2009-08-20
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Publication No.: US07972918B1Publication Date: 2011-07-05
- Inventor: Constantin Bulucea
- Applicant: Constantin Bulucea
- Applicant Address: US CA Santa Clara
- Assignee: National Semiconductor Corporation
- Current Assignee: National Semiconductor Corporation
- Current Assignee Address: US CA Santa Clara
- Agent Ronald J. Meetin
- Main IPC: H01L21/8238
- IPC: H01L21/8238
Abstract:
A semiconductor structure is provided with (i) an empty well having relatively little well dopant near the top of the well and (ii) a filled well having considerably more well dopant near the top of the well. Each well is defined by a corresponding body-material region (108 or 308) of a selected conductivity type. The regions respectively meet overlying zones (104 and 304) of the opposite conductivity type. The concentration of well dopant of the selected conductivity type locally reaches a maximum in each body-material region at a location no more than 10 times deeper below the upper semiconductor surface than the overlying zone's depth, decreases by at least a factor of 10 in moving from the empty-well maximum-concentration location through the overlying zone to the upper surface, and reaches at least one other maximum in moving from the filled-well maximum-concentration location through the other zone to the upper surface.
Information query
IPC分类:
