Invention Grant
US07972944B2 Process simulation method, semiconductor device manufacturing method, and process simulator
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过程模拟方法，半导体器件制造方法和工艺模拟器
- Patent Title: Process simulation method, semiconductor device manufacturing method, and process simulator
- Patent Title (中): 过程模拟方法，半导体器件制造方法和工艺模拟器
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Application No.: US12614912Application Date: 2009-11-09
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Publication No.: US07972944B2Publication Date: 2011-07-05
- Inventor: Tomomi Kusaka , Takahisa Kanemura
- Applicant: Tomomi Kusaka , Takahisa Kanemura
- Applicant Address: JP Tokyo
- Assignee: Kabushiki Kaisha Toshiba
- Current Assignee: Kabushiki Kaisha Toshiba
- Current Assignee Address: JP Tokyo
- Agency: Turocy & Watson, LLP
- Priority: JP2009-003226 20090109
- Main IPC: H01L21/26
- IPC: H01L21/26 ; H01L21/42
Abstract:
A process simulation method includes: converting condition data of plasma doping for introducing an impurity into a semiconductor in a plasma atmosphere to corresponding condition data of ion implantation for implanting impurities as an ion beam into the semiconductor; and calculating device structure data on the basis of the ion implantation condition data converted from the plasma doping condition data.
Public/Granted literature
- US20100178757A1 PROCESS SIMULATION METHOD, SEMICONDUCTOR DEVICE MANUFACTURING METHOD, AND PROCESS SIMULATOR Public/Granted day:2010-07-15
Information query
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