Invention Grant
- Patent Title: Semiconductor device and method of fabricating the same
- Patent Title (中): 半导体装置及其制造方法
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Application No.: US11582348Application Date: 2006-10-18
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Publication No.: US07973419B2Publication Date: 2011-07-05
- Inventor: Tomoyasu Kudo , Kazutaka Ishigo
- Applicant: Tomoyasu Kudo , Kazutaka Ishigo
- Applicant Address: JP Tokyo
- Assignee: Kabushiki Kaisha Toshiba
- Current Assignee: Kabushiki Kaisha Toshiba
- Current Assignee Address: JP Tokyo
- Agency: Finnegan, Henderson, Farabow, Garrett & Dunner, L.L.P.
- Priority: JP2005-308624 20051024
- Main IPC: H01L23/544
- IPC: H01L23/544
Abstract:
According to an aspect of the invention, there is provided a semiconductor device including a semiconductor substrate, a p-type impurity diffusion layer formed on the semiconductor substrate, and Ni silicide formed on the diffusion layer, wherein an alignment mark for lithography is formed on the Ni silicide.
Public/Granted literature
- US20070090549A1 Semiconductor device and method of fabricating the same Public/Granted day:2007-04-26
Information query
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