Invention Grant
US07973549B2 Method and apparatus for calibrating internal pulses in an integrated circuit
有权
用于校准集成电路中的内部脉冲的方法和装置
- Patent Title: Method and apparatus for calibrating internal pulses in an integrated circuit
- Patent Title (中): 用于校准集成电路中的内部脉冲的方法和装置
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Application No.: US11761610Application Date: 2007-06-12
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Publication No.: US07973549B2Publication Date: 2011-07-05
- Inventor: Rajiv V. Joshi , Robert L. Franch , Robert Maurice Houle , Kevin A. Batson
- Applicant: Rajiv V. Joshi , Robert L. Franch , Robert Maurice Houle , Kevin A. Batson
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Tutunjian & Bitetto, PC
- Agent Brian P. Verminski, Esq.
- Main IPC: G01R31/02
- IPC: G01R31/02

Abstract:
A method and circuit for measuring internal pulses includes an enable circuit configured to receive a control signal from an on-chip built-in tester to enable measurement of internal circuits. A delay chain is configured to receive a pulse signal from an on-chip circuit component. Sampling latches each include a data input coupled between adjacent delay elements of the delay chain and synchronized with the clock signal such that a transition in the pulse signal is indicated by comparing adjacent digital values in an output sequence.
Public/Granted literature
- US20080309364A1 METHOD AND APPARATUS FOR CALIBRATING INTERNAL PULSES IN AN INTEGRATED CIRCUIT Public/Granted day:2008-12-18
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