A semiconductor device test apparatus is provided. The semiconductor device test apparatus includes a test unit on which a semiconductor device under test is disposed, and an automatic test equipment (ATE) unit that inputs a test signal to the test unit and reads a test result signal output by the test unit. The semiconductor device test apparatus includes an interface unit that is interposed between the test unit and the ATE unit, and that compares the test signal with the test result signal and outputs to the ATE unit comparison signals indicating whether the semiconductor device is a failure or not or whether a specific bit failure has occurred or not.