Invention Grant
- Patent Title: Selective hardware lock disabling
- Patent Title (中): 选择性硬件锁定禁用
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Application No.: US12562457Application Date: 2009-09-18
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Publication No.: US07975129B2Publication Date: 2011-07-05
- Inventor: Shlomo Raikin , Gad Sheaffer , Doron Orenstlen
- Applicant: Shlomo Raikin , Gad Sheaffer , Doron Orenstlen
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Trop, Pruner & Hu, P.C.
- Main IPC: G06F9/312
- IPC: G06F9/312

Abstract:
Controlling a reorder buffer (ROB) to selectively perform functional hardware lock disabling (HLD) is described. One apparatus embodiment includes a unit to enable an ROB to selectively disable a lock upon Identifying a lock acquire operation (LAO) associated with a critical section (CS) entry point, a unit to selectively retire the LAO, a unit to cause the ROB to selectively disable the lock, and a unit to snoop a buffer. The apparatus may, based on the snooping, selectively abort a transaction associated with the CS.
Public/Granted literature
- US20100011193A1 Selective Hardware Lock Disabling Public/Granted day:2010-01-14
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