Invention Grant
- Patent Title: Semiconductor chip with coil element over passivation layer
- Patent Title (中): 半导体芯片具有钝化层上的线圈元件
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Application No.: US12276419Application Date: 2008-11-24
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Publication No.: US07985653B2Publication Date: 2011-07-26
- Inventor: Wen-Chieh Lee , Mou-Shiung Lin , Chien-Kang Chou , Yi-Cheng Liu , Chiu-Ming Chou , Jin-Yuan Lee
- Applicant: Wen-Chieh Lee , Mou-Shiung Lin , Chien-Kang Chou , Yi-Cheng Liu , Chiu-Ming Chou , Jin-Yuan Lee
- Applicant Address: TW Hsinchu
- Assignee: Megica Corporation
- Current Assignee: Megica Corporation
- Current Assignee Address: TW Hsinchu
- Agency: McDermott Will & Emery LLP
- Main IPC: H01L21/20
- IPC: H01L21/20 ; H01L21/8222 ; H01L21/8234 ; H01L21/4763 ; H01L21/8238

Abstract:
A method for fabricating a circuitry component includes providing a semiconductor substrate, a first coil over said semiconductor substrate, a passivation layer over said first coil; and depositing a second coil over said passivation layer and over said first coil. Said second coil may be deposited by forming a first metal layer over said passivation layer, forming a pattern defining layer over said first metal layer, a first opening in said pattern defining layer exposing said first metal layer, forming a second metal layer over said first metal layer exposed by said first opening, removing said pattern defining layer, and removing said first metal layer not under said second metal layer.
Public/Granted literature
- US20090104769A1 Semiconductor chip with coil element over passivation layer Public/Granted day:2009-04-23
Information query
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