Invention Grant
- Patent Title: Method for manufacturing soi wafer
- Patent Title (中): 制造硅片的方法
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Application No.: US12450960Application Date: 2008-04-16
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Publication No.: US07985660B2Publication Date: 2011-07-26
- Inventor: Isao Yokokawa , Hiroshi Takeno , Nobuhiko Noto
- Applicant: Isao Yokokawa , Hiroshi Takeno , Nobuhiko Noto
- Applicant Address: JP Tokyo
- Assignee: Shin Etsu Handotai Co., Ltd.
- Current Assignee: Shin Etsu Handotai Co., Ltd.
- Current Assignee Address: JP Tokyo
- Agency: Oliff & Berridge, PLC
- Priority: JP2007-135298 20070522
- International Application: PCT/JP2008/000995 WO 20080416
- International Announcement: WO2008/146441 WO 20081204
- Main IPC: H01L21/30
- IPC: H01L21/30 ; H01L21/46

Abstract:
The present invention provides a method for manufacturing an SOI wafer, including: a step of preparing a base wafer consisting of a p+ silicon single crystal wafer and a bond wafer consisting of a silicon single crystal wafer containing a dopant at a lower concentration than that in the base wafer; a step of forming a silicon oxide film on an entire surface of the base wafer based on thermal oxidation; a step of bonding the bond wafer to the base wafer through the silicon oxide film; and a step of reducing a thickness of the bond wafer to form an SOI layer, wherein a step of forming a CVD insulator film on a surface on an opposite side of a bonding surface of the base wafer is provided before the thermal oxidation step for the base wafer. As a result, it is possible to provide the method for manufacturing an SOI wafer which can easily prevent the p-type dopant contained in the base wafer from outwardly diffusing from the surface on the opposite side of the bonding surface of the base wafer due to a high-temperature heat treatment, suppress this dopant from being mixed into the SOI layer, and reduce warpage.
Public/Granted literature
- US20100112781A1 METHOD FOR MANUFACTURING SOI WAFER Public/Granted day:2010-05-06
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