Invention Grant
- Patent Title: Semiconductor device and associated manufacturing methodology for decreasing thermal instability between an insulating layer and a substrate
- Patent Title (中): 半导体器件和相关的制造方法，用于降低绝缘层和衬底之间的热不稳定性
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Application No.: US12482054Application Date: 2009-06-10
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Publication No.: US07986016B2Publication Date: 2011-07-26
- Inventor: Yoshiki Kamata , Akira Takashima
- Applicant: Yoshiki Kamata , Akira Takashima
- Applicant Address: JP Tokyo
- Assignee: Kabushiki Kaisha Toshiba
- Current Assignee: Kabushiki Kaisha Toshiba
- Current Assignee Address: JP Tokyo
- Agency: Oblon, Spivak, McClelland, Maier & Neustadt, L.L.P.
- Priority: JP2008-235514 20080912
- Main IPC: H01L29/51
- IPC: H01L29/51 ; H01L21/28
Abstract:
According to an aspect of the present invention, there is provided a semiconductor device including: a substrate that includes a semiconductor region including Ge as a primary component; a compound layer that is formed above the semiconductor region, that includes Ge and that has a non-metallic characteristic; an insulator film that is formed above the compound layer; an electrode that is formed above the insulator film; and source/drain regions that is formed in the substrate so as to sandwich the electrode therebetween.
Public/Granted literature
- US20100065886A1 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF Public/Granted day:2010-03-18
Information query
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