Invention Grant
- Patent Title: Multilayer wiring substrate, semiconductor package, and method of manufacturing semiconductor package
- Patent Title (中): 多层布线基板，半导体封装以及半导体封装的制造方法
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Application No.: US12382546Application Date: 2009-03-18
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Publication No.: US07986035B2Publication Date: 2011-07-26
- Inventor: Yuichi Miyagawa
- Applicant: Yuichi Miyagawa
- Applicant Address: JP Kawasaki-shi, Kanagawa
- Assignee: Renesas Electronics Corporation
- Current Assignee: Renesas Electronics Corporation
- Current Assignee Address: JP Kawasaki-shi, Kanagawa
- Agency: McGinn IP Law Group, PLLC
- Priority: JP2008-097815 20080404
- Main IPC: H01L23/02
- IPC: H01L23/02
Abstract:
A multilayer wiring substrate included in the semiconductor package includes: a first insulating layer and a second insulating layer, in which wiring layers are respectively provided on the upper and the lower surfaces; and; a core layer provided between the first insulating layer and the second insulating layer. The first insulating layer and the second insulating layer are constituted by different materials from each other.
Public/Granted literature
- US20090250802A1 Multilayer wiring substrate, semiconductor package, and methods of manufacturing semiconductor package Public/Granted day:2009-10-08
Information query
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