Invention Grant
- Patent Title: Semiconductor device including address signal generating protion and digital-to-analog converter
- Patent Title (中): 半导体器件包括地址信号产生部分和数模转换器
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Application No.: US12379773Application Date: 2009-02-27
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Publication No.: US07986156B2Publication Date: 2011-07-26
- Inventor: Jun Ikeda , Morihisa Hirata
- Applicant: Jun Ikeda , Morihisa Hirata
- Applicant Address: JP Kawasaki-shi, Kanagawa
- Assignee: Renesas Electronics Corporation
- Current Assignee: Renesas Electronics Corporation
- Current Assignee Address: JP Kawasaki-shi, Kanagawa
- Agency: McGinn IP Law Group, PLLC
- Priority: JP2008-067309 20080317
- Main IPC: G01R31/3187
- IPC: G01R31/3187 ; G01R31/26
Abstract:
An exemplary aspect of an embodiment of the present invention is a semiconductor device including a plurality of test elements formed in an array on a semiconductor substrate, an address signal generating portion that generates an address signal corresponding to each of the test elements, and a digital-to-analog converter that converts the address signal into an analog signal and outputs the converted analog signal. The present invention enables to recognize which DUT is being measured.
Public/Granted literature
- US20090230987A1 Semiconductor device Public/Granted day:2009-09-17
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