Invention Grant
US07986550B2 Analog access circuit for validating chalcogenide memory cells 有权
用于验证硫族化物记忆单元的模拟访问电路

Analog access circuit for validating chalcogenide memory cells
Abstract:
An analog access circuit for characterizing chalcogenide memory cells is disclosed. The analog access circuit includes an analog access control module, an address and data control module, and an analog cell access and current monitoring module. The analog access control module selectively controls whether a normal memory access or an analog memory access should be performed on a specific chalcogenide memory cell. The address and data control module allows a normal memory access to the chalcogenide memory cell according to an input address. The analog cell access and current monitoring module performs an analog memory access to the chalcogenide memory cell according to the input address, and monitors a reference current from a sense amplifier associated with the chalcogenide memory cell.
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