A memory module with a playback mode for audio signals through a playback port, and having an input port for input of both analogue and data signals as well as power, the power being from a separate power source. The input port may be a USB or IEEE1394 port and may be used with a battery pack and cradle having a female socket for receiving therein the connector. The input port includes at least four terminals being: ground, power, and two differential data terminals; the differential data terminals carrying signals at frequencies in the range of from 1 to 480 MHz. The input port is also for passing power from the battery pack and cradle to the memory module.