A method of sequencing wafer processing order to minimize sequence correlation in a cyclical two pattern model by generating a set of sequences of wafer identifiers that each specify an order by which one or more fabrication equipments processes wafers of a wafer lot, where the wafer lot contains a number of slots and the fabrication equipments each includes a first subsystem for processing wafers in odd-numbered slots of the first wafer lot and a second subsystem for processing wafers in even-numbered slots of the first wafer lot, and where each of the generated wafer sequences contains exactly a number of wafer identifiers that match the wafer identifiers in every other wafer sequence indexed in the set.